![]() Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Priority to JP2002339307A priority Critical patent/JP2004173168A/en Priority to JP2002-339307 priority Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd Assigned to FUJITSU LIMITED reassignment FUJITSU LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Original Assignee Fujitsu Ltd Priority date (The priority date is an assumption and is not a legal conclusion. ![]() Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.) ( en Inventor Shunichiro Masaki Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Expired - Fee Related Application number US10/705,977 Other versions US20040100947A1 Google Patents Multiplexer circuit for converting parallel data into serial data at high speed and synchronizing the serial data with a clock signalÄownload PDF Info Publication number US6970116B2 US6970116B2 US10/705,977 US70597703A US6970116B2 US 6970116 B2 US6970116 B2 US 6970116B2 US 70597703 A US70597703 A US 70597703A US 6970116 B2 US6970116 B2 US 6970116B2 Authority US United States Prior art keywords circuit switching clock signal multiplexer circuit conductivity type Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. ![]() ![]() Google Patents US6970116B2 - Multiplexer circuit for converting parallel data into serial data at high speed and synchronizing the serial data with a clock signal US6970116B2 - Multiplexer circuit for converting parallel data into serial data at high speed and synchronizing the serial data with a clock signal ![]()
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